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By investigating the wavelength changes of the two sensor indicators, which were induced by pH and temperature variations, linear and independent spectral responses to both pH and temperature variations were experimentally confirmed in a pH range from 1 to 11 and a temperature range from 25 to 65 °C. Owing to the unique pH and temperature responses of the fabricated HB-PS-LPFG, ambient variations in pH and temperature could be simultaneously estimated from the measured wavelength changes and sensitivities of the two sensor indicators.In this paper, we present a capacitorless one transistor dynamic random access memory (1T-DRAM) based on a polycrystalline silicon (poly-Si) double gate MOSFET with grain boundaries (GBs). Several studies have been conducted to implement 1T-DRAM using poly-Si. This is because poly-Si has the advantage of low-cost fabrication and can be stacked. However, poly-Si has GBs, which can adversely affect semiconductor device. So far, related studies on poly-Si-based 1T-DRAM have only focused on GBs present in the channel domain. Hence, in this study, we analyzed the transfer and memory characteristics when a GB is present in the source and drain regions. As a result, we found that in the center of the depletion region in the source and channel junction, where the effect of GB was most significant, sensing margins decreased the most from 0.88 to 0.29 μA/μm, and retention time (RT) decreased from 85 ms to 47 μs. In addition, we found that at the center of the depletion region in the drain and channel junction, where the effect of GBs was most significant in the drain region, RT decreased the most from 85 ms to 52 μs.We investigated the effect of the interface trap charge in a monolithic three-dimensional inverter structure composing of JLFETs (M3DINV-JLFET), using the interface trap charge distribution extracted in the previous study. The effect of interface trap charge was compared with a conventional M3DINV composing of MOSFETs (M3DINV-MOSFETs) by technology computer-aided design simulation. When the interface trap charges in both M3DINV-JLFET and M3DINV-MOSFET are added, the threshold voltages, on-current levels, and subthreshold swings of both JLFETs and MOSFETs increase, decrease, and increase, respectively, and switching voltages and propagation delays of M3DINV are shifted and increased, respectively. However, since JLFET and MOSFET have different current paths of bulk and interface in channel, respectively, MOSFET is more affected by the interface trap, and M3DINV-JLFET has almost less effect of interface trap at different thickness of interlayer dielectric, compared to M3DINV-MOSFET.In this work, we experimentally demonstrated an optical fiber sensor capable of performing simultaneous measurement of torsion and temperature using a π-phase-shifted long-period fiber grating (LPFG) inscribed on double-clad fiber (DCF), referred to as a PS-DC-LPFG. The fabricated PSDC- LPFG showed split attenuation bands near its resonance wavelength, and the two dips in these bands were selected as sensor indicators, denoted as Dips A and B, for the simultaneous measurement of torsion and temperature. The torsion and temperature responses of the two indicators were investigated in a twist angle range from -360° to 360° and a temperature range from 30 to 120 °C, respectively. When the twist angle increased from 0° to 360° (clockwise) at room temperature, both Dips A and B showed redshifts. On the contrary, when the twist angle decreased from 0° to -360° (counterclockwise), the two dips showed blueshifts. In terms of temperature responses, both dips showed redshifts with increasing ambient temperature while the sensor head (i.e., the PS-DC-LPFG) remained straight without any applied torsion. Nintedanib cell line Owing to their linear and independent responses to torsion and temperature, the changes in torsion and temperature applied to the PSDC- LPFG could be simultaneously estimated from the measured wavelength shifts and calculated sensitivities of the two indicator dips.In this paper, a 1T-DRAM based on the junctionless field-effect transistor (JLFET) with a silicon-germanium (SiGe) and silicon (Si) nanotube structure was designed and investigated by using technology computer-aided design (TCAD) simulations. Utilizing bandgap engineering to make a quantum well in the core-shell structure, the storage pocket is formed by the difference in bandgap energy between SiGe and Si. By applying different voltage conditions at the inner gate and outer gate, excess holes are generated in the storage region by the band-to-band tunneling (BTBT) mechanism. The BTBT mechanism results in the floating body effect, which is the principle of 1T-DRAM. The varying amount of the accumulated holes in the SiGe region allows differentiating between state "1" and state "0." Additionally, the outer gate plays a role of the conventional gate, while the inner gate retains holes in the hold state by applying voltage. Consequently, the optimized SiGe/Si JLFET-based nanotube 1T-DRAM achieved a high sensing margin of 15.4 μA/μm, and a high retention time of 105 ms at a high temperature of 358 K. In addition, it has been verified that a single cycle of 1T-DRAM operations consumes only 33.6 fJ of energy, which is smaller than for previously proposed 1T-DRAMs.A modeling method using juncap2 physical compact model with SRH (Shockley-Read-Hall), TAT (Trap-Assisted-Tunneling), BBT (Band-to-Band Tunneling) effects is presented for the leakage current in a laterally diffused metal-oxide semiconductor (LDMOS). The juncap2 model is successfully combined with BSIM4 model and it is validated with measurement data. The model accurately predicts the leakage current characteristics for the entire bias region and temperature.In this paper, a 1T-DRAM based on the junctionless field-effect transistor (JLFET) with an ultrathin polycrystalline silicon layer was designed and investigated by using technology computer-aided design simulation (TCAD). The application of a negative voltage at the control gate results in the generation of holes in the storage region by the band-to-band tunneling (BTBT) effect. Memory characteristics such as sensing margin and retention time are affected by the doping concentration of the storage region, bias condition of the program, and length of the intrinsic region. In addition, the gate acts as a switch that controls the transfer characteristics while the control gate plays a role in retaining holes in the hold state. The device was optimized, considering various parameters such as the doping concentration of the storage region (Nstorage), intrinsic region length (Lint), and operation bias conditions to obtain a high sensing margin of 49.7 μA/μm and a long retention time of 2 s even at a high temperature of 358 K. The obtained retention time is almost 30 times longer than that predicted for modern DRAM cells by the International technology roadmap for semiconductors (ITRS).A capacitorless one-transistor dynamic random-access memory cell with a polysilicon body (poly-Si 1T-DRAM) has a cost-effective fabrication process and allows a three-dimensional stacked architecture that increases the integration density of memory cells. Also, since this device uses grain boundaries (GBs) as a storage region, it can be operated as a memory cell even in a thin body device. GBs are important to the memory characteristics of poly-Si 1T-DRAM because the amount of trapped charge in the GBs determines the memory's data state. In this paper, we report on a statistical analysis of the memory characteristics of poly-Si 1T-DRAM cells according to the number and location of GBs using TCAD simulation. As the number of GBs increases, the sensing margin and retention time of memory cells deteriorate due to increasing trapped electron charge. Also, "0" state current increases and memory performance degrades in cells where all GBs are adjacent to the source or drain junction side in a strong electric field. These results mean that in poly-Si 1T-DRAM design, the number and location of GBs in a channel should be considered for optimal memory performance.In this study, we report the self-nanostructured growth of 4,6-bis(3,5-di(pyridin-3-yl)phenyl)-2-methylpyrimidine (B3PyMPM), which is widely used as an electron transport layer for organic light-emitting diodes (OLEDs). B3PyMPM nanostructures were formed on the surface of a substrate using vacuum thermal evaporation, and parameters such as substrate rotation speed and evaporation angle were altered to study their effect on the growth of nanostructures. Moreover, it was proven that the growth of nanostructures was dependent on the underneath materials. This self-nanostructured growth of B3PyMPM would affect the outcoupling and the efficiency improvement of OLEDs.In this study, we report the effects of the substrate rotational speed on the morphological characteristics of lithium fluoride (LiF) during thermal evaporation. LiF is used as a typical material in a vacuum-level shift-based electron injection layer and can improve both the charge injection and light emission properties when inserted into the electrode/organic material interface of organic light-emitting diodes (OLEDs). In general OLED research, rotary evaporation is widely used to ensure uniformity. However, there are few reports regarding the effects of this rotary evaporation method on the morphological characteristics of the thin films. Therefore, in this study, we analyzed the effects of rotary variations on the morphological and electron injection characteristics during deposition. The root mean square roughness of the LiF thin film deposited on Alq₃ changed by up to 12.3%. Additionally, the driving voltage of the electron-only device showed a difference of 2.3 V at maximum and a change in the slope of the ohmic region was demonstrated. The morphological change in the LiF thin film based on the rotational speed of the substrate had a significant influence on the reaction at the electrode/organic material interface.We propose a passband-flattened frequency-tunable optical multiwavelength filter with a composite combination of waveplates, which is realized by harnessing a polarization-diversified loop structure. The proposed filter comprises a polarization beam splitter (PBS), two polarization-maintaining fiber (PMF) segments of equal length, an ordered waveplate combination (OWC) of a half-wave plate (HWP) and a quarter-wave plate (QWP) before the first PMF segment, and an OWC of a QWP and an HWP before the second PMF segment. The second PMF segment is butt-coupled to one port of the PBS so that its slow axis is oriented at 22.5° for the horizontal axis of the PBS. Based on the filter transmittance derived through the Jones calculus, we found the orientation angle (OA) sets of the four waveplates, which could induce an extra phase shift Φ from 0° to 360° in the passband-flattened transmittance function. From the transmission spectra calculated at the eight selected OA sets, which caused Φ to increase from 0° to 315° by steps of 45°, it was confirmed that the passband-flattened multiwavelength spectrum can be continuously tuned by properly controlling the OAs. This indicates continuous wavelength tunability based on composite OWCs. Then, this theoretical prediction was verified by experimental demonstration.
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