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[vbios_version = 20160113:1434:/projects/hcm/shadowcat/validation/vbios4]
vBIOS relocated from 0x0
vBIOS preparing for DDR-INIT ...
Mapped 8.000 MB VA: 0x001D000000 -> PA: 0x001D000000 Cacheable [attr:7]
Mapped 208.000 MB VA: 0x0010000000 -> PA: 0x0010000000 Non-Cacheable [attr:0]
Mapped 32.000 MB VA: 0x001E000000 -> PA: 0x001E000000 Non-Cacheable [attr:0]
Mapped 256.000 MB VA: 0x0000000000 -> PA: 0x0000000000 Non-Cacheable [attr:0]
Mapped 1.000 GB VA: 0x0020000000 -> PA: 0x0020000000 Non-Cacheable [attr:0]
Arch-timers running at 50 Mhz
Checking arch-timers ... [incrementing]
Using arch-timers for delays USDELAY(x)/MSDELAY(x)
Configuring DDR for 'TIGERSHARK' platform ...
VBIOS DDR-init...
Mapped 8.000 GB VA: 0x4000000000 -> PA: 0x4000000000 Cacheable [attr:7]
ECC Done!
Current MCB[0] temp: 0x0
DDRINIT DONE !
Jumping to 2nd-stage VBIOS @ 0x0002CF20 ...
VBIOS relocating ...
[vbios_version = 20160113:1434:/projects/hcm/shadowcat/validation/vbios4]
vBIOS executing from 0x4000000000 ...
Mapped 8.000 MB VA: 0x4000000000 -> PA: 0x4000000000 Cacheable [attr:7]
Mapped 208.000 MB VA: 0x0010000000 -> PA: 0x0010000000 Non-Cacheable [attr:0]
Mapped 32.000 MB VA: 0x001E000000 -> PA: 0x001E000000 Non-Cacheable [attr:0]
Mapped 7.000 GB VA: 0x4000800000 -> PA: 0x4000800000 Cacheable [attr:7]
Mapped 256.000 MB VA: 0x0000000000 -> PA: 0x0000000000 Non-Cacheable [attr:0]
Mapped 512.000 KB VA: 0x001D000000 -> PA: 0x001D000000 Non-Cacheable [attr:0]
Mapped 1.000 GB VA: 0x0020000000 -> PA: 0x0020000000 Non-Cacheable [attr:0]
GIC Init ...
GIC Distributor found @ 64KB offset to GIC-base
GIC: Group-0 enabled
GIC-TYPE: CPUs-8, Max-IRQs-352
GIC CPU interface init for core-0
arch-timers init ... Checking arch-timers ... [incrementing]
Arch-timers running at 50 Mhz
Using arch-timers for delays USDELAY(x)/MSDELAY(x)
pcphperrintmsk : 0xffffefef
pcplperrintmsk : 0xfffffffe
pcppmuerrintmsk : 0xfffffffc
MCU/MCB Error interrupts : unmask : OK
MCU, MCB ERROR Interrupts(64, 65) Configuration ENABLE : ok
ECC ERR IRQ Configuration Enable : ok
Enabling IOB-snooping
Checking FPU ... OK
SMP Init ...
GIC CPU interface init for core-1
Core-1 is up and spinning ...
GIC CPU interface init for core-2
Core-2 is up and spinning ...
GIC CPU interface init for core-3
Core-3 is up and spinning ...
GIC CPU interface init for core-4
Core-4 is up and spinning ...
GIC CPU interface init for core-5
Core-5 is up and spinning ...
GIC CPU interface init for core-6
Core-6 is up and spinning ...
GIC CPU interface init for core-7
Core-7 is up and spinning ...
###########################################################
< X-GENE-II:SHADOWCAT with ARM-v8 >
===========================================================
Processor : APM Strega ARMv8(rev:0)
Platform : TIGERSHARK
Software : APM Validation Software, vBIOS
SLIMpro FW : 2.4
Clocks : CPU @ 2400 MHz, PCP @ 2400 MHz
SOC @ 2000 MHz, IOB @ 0400 MHz
AXI @ 0250 MHz, AHB @ 0200 MHz
----------------------------------------------------------
SW Features : SMP:on, #CPUs:8, FPU:on, MMU:on,
L3C:off, GIC:on, Timers:on, NOR:on
----------------------------------------------------------
DDR Memory : #Regions : 1
DDR Map : [0]va: 0x4000000000 -> pa: 0x4000000000
DDR Size : 8 GB
----------------------------------------------------------
eFUSE : EFUSE_CFG1: 0x00000000
EFUSE_CFG0: 0x00000000
Boot info : type : BOOT-STRAP
mode : NOR-16b
strap : 0x18001
----------------------------------------------------------
Build Type : nor_ddr
Build ID : "20160113-1434" [OptFlag: O2]
###########################################################
[vBIOS/TIGERSHARK]$>
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