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Index: drivers/net/xpmd/nic_xdma.c
===================================================================
--- drivers/net/xpmd/nic_xdma.c (revision 95)
+++ drivers/net/xpmd/nic_xdma.c (working copy)
@@ -45,10 +45,11 @@
__XDMA_SET_PHYS_ADDR (d->src_addr, src_pa);
}

-static inline void __xdma_scrub_desc (struct xdma_desc volatile *d)
+static inline void __xdma_set_desc_ctrl (struct xdma_desc volatile *d, uint32_t adj_desc, uint32_t magic, uint32_t ctrl)
{
/* if no MAGIC code, the desc is not valid to process */
- d->control = 0;
+ d->control = magic | ctrl |
+ ((adj_desc << XDD_NXT_ADJ_SHIFT) & XDD_NXT_ADJ_MASK);
}

static inline void __xdma_set_dst_addr (struct xdma_desc volatile *d, phys_addr_t dst_pa)
@@ -347,6 +348,7 @@
uint32_t dstat, pkt_len;
uint64_t pkt_flags;
uint32_t i = -1U;
+ uint32_t adj_desc = nb_pkts - 2;
uint64_t rx_bytes = 0;

#if (XDMA_ALGO_IS == XDMA_ALGO1)
@@ -391,6 +393,10 @@
#endif
}

+#if USING_ADJ_DESC_CNT
+ adj_desc = (adj_desc < 0) ? 0 : adj_desc;
+#endif
+
for (i = 0; i < nb_pkts; i++) {
dn = &dn_ring[dn_curIdx];
xdn = &dn->xdn;
@@ -434,6 +440,12 @@
/*setup for new rx desc and wb*/
xdn->dwb_va->status = 0;

+#if USING_ADJ_DESC_CNT
+ if (adj_desc) {
+ __xdma_set_desc_ctrl (xdn->desc_va, adj_desc--,
+ XDD_MAGIC_CODE, (xdn->desc_va.control & XDD_CTRL_MASK));
+ }
+#endif
__xdma_set_dst_addr (xdn->desc_va,
rte_mbuf_data_dma_addr_default (nmbuf));

@@ -506,6 +518,7 @@
struct engine_regs volatile *er = txq->engine.er;
uint32_t dctrl = 0;
uint64_t tx_bytes = 0;
+ uint32_t adj_desc = nb_pkts;

/* Need to test with multiple burst numbers and debug minor issues -TODO*/
for (i = 0; (i < nb_pkts) && nb_tx_free; i++) {
@@ -539,6 +552,8 @@
XPMD_FREE (rte_pktmbuf_free_seg, dn->mbuf);

dctrl = mseg->next ? 0 : XDD_EOP | XDD_COMPLETED;
+#if USING_ADJ_DESC_CNT
+#endif
__xdma_fill_h2cdesc (xdn->desc_va, dctrl | XDD_MAGIC_CODE ,
mseg->data_len, rte_mbuf_data_dma_addr (mseg));

Index: drivers/net/xpmd/rte_xpmd.h
===================================================================
--- drivers/net/xpmd/rte_xpmd.h (revision 95)
+++ drivers/net/xpmd/rte_xpmd.h (working copy)
@@ -40,6 +40,13 @@
* and we can cover more descriptors in same burst rx */
#define XDMA_START_DLY 15 /*Can we still reduce this one?*/

+/* Adjacent descriptors count can be used for
+ * burst read of tx|rx q descriptors by xdma engine;
+ * define the following as 1 to enable burst adjecent descriptor read;
+ * define as 0 to disable the same
+ */
+#define USING_ADJ_DESC_CNT 1
+
/* With actual hw, basic dma-completion & engine-mgmt
* is not simple, so we go with simpler (wait on spot) mode,
* slowly moving towards dynamic mgmt modes as explained below */
     
 
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